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RT9246A
Multi-Phase PWM Controller for CPU Core Power Supply
General Description
The RT9246A is a multi-phase buck DC/DC controller integrated with all control functions for GHz CPU VRM. The RT9246A controls 2 or 3 buck switching stages operating in interleaved phase set automatically. The multiphase architecture provides high output current while maintaining low power dissipation on power devices and low stress on input and output capacitors. The high equivalent operating frequency also reduces the component dimension and the output voltage ripple in load transient. RT9246A controls both voltage and current loops to achieve good regulation, response & power stage thermal balance. Precise current loop using Inductor DCR as sense component builds precise load line for strict VRM DC & transient specification and also ensures thermal balance of different power stages. The settings of current sense, droop tuning, VCORE initial offset and over current protection are independent to compensation circuit of voltage loop. The feature greatly facilitates the flexibility of CPU power supply design and tuning. The DAC output of RT9246A supports K8 CPU by 5-bit VID input, precise initial value & smooth VCORE transient at VID jump. The IC monitors the VCORE voltage for PGOOD and over-voltage protection. Soft-start, over-current protection and programmable under-voltage lockout are also provided to assure the safety of microprocessor and power system.
Features
Multi-Phase Power Conversion with Automatic Phase Selection K8 DAC Output with Active Droop Compensation for Fast Load Transient Smooth VCORE Transition at VID Jump Power Stage Thermal Balance by Inductor DCR Current Sense Hiccup Mode Over-Current Protection Programmable Switching Frequency (50kHz to 400kHz per Phase), Under-Voltage Lockout and Soft-Start High Ripple Frequency Times Channel Number RoHS Compliant and 100% Lead (Pb)-Free
Applications
AMD(R) AthlonTM 64 and OpteronTM Processors Voltage Regulator Low Output Voltage, High Current DC-DC Converters Voltage Regulator Modules
Pin Configurations
(TOP VIEW)
VID4 VID3 VID2 VID1 VID0 NC FBRTN FB COMP PGOOD DVD SS RT VOSS 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 VCC PWM1 PWM2 PWM3 NC ISP1 ISP2 ISP3 NC GND ADJ IOUT ICOMMON IMAX
Ordering Information
RT9246A Package Type C : TSSOP-28 Operating Temperature Range P : Pb Free with Commercial Standard G : Green (Halogen Free with Commercial Standard)
TSSOP-28
Note : RichTek Pb-free and Green products are : RoHS compliant and compatible with the current requirements of IPC/JEDEC J-STD-020. Suitable for use in SnPb or Pb-free soldering processes. 100% matte tin (Sn) plating. DS9246A-04 March 2007 www.richtek.com 1
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L1 1uH ATX_12V C10 C11 10uF 10uF C12 1000uF 10uF C15 1000uF 10uF ATX_12V R29 0 R28 10 ATX_5V 1 BOOT UGATE Q1 PHASE VCC PWM PGND 6 LGATE 5 Q2 R31 0 7 R32 2.2 C18 3.3nF 8 D1 1N4148 C16 1uF C13 C14 VIN
RT9246A
RT9619
R30 0
L2 0.3uH
R9 10 4 C17 1uF 2 C5 1uF
Typical Application Circuit
VID4 VCC PWM1 PWM2 PWM3 NC BOOT UGATE PHASE VCC PWM LGATE PGND 6 ISP1 ISP2 ISP3 NC GND 1uF R14 0 R22 ATX_12V R39 0 R38 10 D3 1N4148 NC NC R24 NC 1uF R23 ADJ IOUT ICOMMON IMAX R18 82k VCORE 4 C26 1uF 2 VCC PWM LGATE PGND 6 VCOREFB_H R17 1k 15 16 R16 300 17 R15 1k 18 R13 300 1uF C25 1uF 19 C6 NC C8 C7 C9 20 21 R21 430 C20 1uF 2 22 R20 430 4 23 R19 430 24 1 25 R33 10 D2 1N4148 26 R34 0 C19 1uF 27 ATX_12V
1 28
VID4
VID3
2
VID3
VIN VCORE C21 C22 R35 0 8 7 5 R36 0 R37 2.2 Q4 C24 3.3nF 10uF Q3 10uF C23 1000uF L3 0.3uH
VID2
3
VID2
VID1
4
VID1
VID0
5
VID0
RT9619
C31 to C40 560uF x 10
6
NC
R1 3k
7
C2
33pF
FBRTN
8
C41 to C58 22uF x 18
FB
C1 NC
C3 10nF
R2 15k
9
RT9246A
COMP
ATX_5V
R3 10k
10
PGOOD
R4 1k
11
DVD
VIN
ATX_12V
12
SS
R5 9.1k
C4 0.1uF
C27 1
C28
C29
13
RT
RT9619
BOOT UGATE PHASE
8 7 5
R40 0
10uF Q5
10uF
1000uF L4 0.3uH R41 0 R42 2.2 Q6 C30 3.3nF R43 NTC
14
VOSS
R6 1k
R7 13k
R8 1M
R26 1k
R27 1k
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R25 1k
RT9246A
Functional Pin Description
VID4 (Pin 1), VID3 (Pin 2), VID2 (Pin 3), VID1 (Pin 4), VID0 (Pin 5) DAC voltage identification inputs for K8. These pins are internally pulled to 2.2V if left open. NC (Pin 6, Pin 20, Pin 24) No Input Connection FBRTN (Pin 7) VCORE differential sense return. FB (Pin 8) Inverting input of the internal error amplifier. COMP (Pin 9) Output of the error amplifier and input of the PWM comparator. PGOOD (Pin 10) Power good open-drain output. DVD (Pin 11) Programmable power UVLO detection or converter enable input. SS (Pin 12) Connect this SS pin to GND with a capacitor to set the soft-start time interval and to smooth VCORE transient at VID Jump. RT (Pin 13) Switching frequency setting. Connect this pin to GND with a resistor to set the frequency. VOSS (Pin 14) VCORE initial value offset. Connect this pin to GND with a resistor to set the offset value. IMAX (Pin 15) Over-Current protection set. ICOMMON (Pin 16) Common negative input of current sense amplifiers for all three channels. IOUT (Pin 17) Output current indication pin. The current through IOUT pin is proportional to the output current. ADJ (Pin 18)
Oscillator Ferquency vs. RRT
700 600 500 400 300 200 100 0 0 10 20 30 40 50 60 70
Current sense output for active droop adjust. Connect a resistor from this pin to GND to set the load droop. GND (Pin 19) IC ground. ISP1 (Pin 23), ISP2 (Pin 22), ISP3 (Pin 21) Current sense positive input pins for individual converter channel current sensing. PWM1 (Pin 27), PWM2 (Pin 26), PWM3 (Pin 25) PWM outputs for each driven channel. Connect these pins to the PWM input of the MOSFET driver. For systems which use 2 channels, connect PWM3 high. VCC (Pin 28) IC power supply. Connect this pin to a 5V supply.
Oscillator Ferquency (kHz)
RRT (k) (k )
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Function Block Diagram
VID0 VID1 VID2 VID3 VID4 OCP Setting Power On Reset ++
-
DAC
PWMCP
INH
Oscillator & Sawtooth
+
INH
FBRTN ++ OVP Trip Point ++
+ + -
DAC + Droop
+
PG Trip Point
Offset Currrent Source/Sink
+ +
VOSS
GAP AMP
Current Correction
SS Control
-
FB
COMP
SS
ADJ
IOUT GND
+
-
-
ERROR AMP
Mux
SUM/M
+
CSA
-
+
+
+
-
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IMAX PGOOD VCC DVD RT
INH
RT9246A
PWM Logic & Driver
PWM1
PWM Logic & Driver
PWM2
PWMCP
INH
PWM Logic & Driver PWMCP
PWM3
ICOMMON ISP1 Mux ISP2 ISP3
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RT9246A
Table 1. Output Voltage Program
VID4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 VID3 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 VID2 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 VID1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 VID0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 Nominal Output Voltage DACOUT 1.550 1.525 1.500 1.475 1.450 1.425 1.400 1.375 1.350 1.325 1.200 1.275 1.250 1.225 1.200 1.175 1.150 1.125 1.100 1.075 1.050 1.025 1.000 0.975 0.950 0.925 0.900 0.875 0.850 0.825 0.800 Shutdown
Note: (1) 0 : Connected to GND (2) 1 : Open
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RT9246A
Absolute Maximum Ratings
(Note 1) 7V GND-0.3V to VCC+0.3V 1W 100C/W 150C 260C -65C to 150C 2kV 200V Supply Voltage, VCC ------------------------------------------------------------------------------------------Input, Output or I/O Voltage ---------------------------------------------------------------------------------Power Dissipation, PD @ TA = 25C TSSOP-28 -----------------------------------------------------------------------------------------------------Package Thermal Resistance (Note 4) TSSOP-28, JA -------------------------------------------------------------------------------------------------Junction Temperature -----------------------------------------------------------------------------------------Lead Temperature (Soldering, 10 sec.) -------------------------------------------------------------------Storage Temperature Range --------------------------------------------------------------------------------ESD Susceptibility (Note 2) HBM (Human Body Mode) ----------------------------------------------------------------------------------MM (Machine Mode) -------------------------------------------------------------------------------------------
Recommended Operating Conditions
(Note 3)
Supply Voltage, VCC ------------------------------------------------------------------------------------------- 5V 10% Ambient Temperature Range --------------------------------------------------------------------------------- 0C to 70C Junction Temperature Range --------------------------------------------------------------------------------- 0C to 125C
Electrical Characteristics
(VCC = 5V, TA = 25C, unless otherwise specified)
Parameter VCC Supply Current Nominal Supply Current Power-On Reset POR Threshold Hysteresis VDVD Threshold Oscillator Free Running Frequency Frequency Adjustable Range Ramp Amplitude Ramp Valley Maximum On-Time of Each Channel RT Pin Voltage Reference and DAC DACOUT Voltage Accuracy DAC (VID0-VID4) Input Low DAC (VID0-VID4) Input High
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Symbol
Test Conditions
Min
Typ
Max
Units
ICC VCCRTH VCCHYS
PWM 1,2,3 Open
--
12 4.2 0.5 1.0 60 200 -1.9 1.0 66 1.0
-4.5 -1.1 -230 400 --75 1.1
mA V V V mV kHz kHz V V % V
VCC Rising Enable
4.0 0.2 0.9 -170 50
Input High Input Low
VDVDTH VDVDHYS fOSC fOSC_ADJ VOSC VRV VRT
RRT = 20k RRT = 20k
--62
RRT = 20k VDAC 1V VDAC < 1V
0.9
VDAC VILDAC VIHDAC
-1 -10 -1.2
-----
+1 +10 0.8 --
% mV V V
To be continued
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RT9246A
Parameter DAC (VID0-VID4) Pull-up Voltage DAC (VID0-VID4) Pull-up Resistance VOSS Pin Voltage Error Amplifier DC Gain Gain-Bandwidth Product Slew Rate Current Sense GM Amplifier ICOMMON Full Scale Source Current ICOMMON Current for OCP Protection IMAX Voltage Over-Voltage Trip (VFB- VDAC) Power Good Output Low Voltage VPGOODL IPGOOD = 4mA --0.2 V VIMAX OVT RIMAX = 10k RADJ = 0 0.84 340 0.94 400 1.05 450 V mV 100 150 ----A A GBW SR CCOMP = 10pF ---65 10 8 ---dB MHz V/s VVOSS RVOSS = 100k Symbol Test Conditions Min 2.0 10 0.9 Typ 2.2 13 1.0 Max 2.4 16 1.1 Units V k V
Note 1. Stresses listed as the above "Absolute Maximum Ratings" may cause permanent damage to the device. These are for stress ratings. Functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may remain possibility to affect device reliability. Note 2. Devices are ESD sensitive. Handling precaution recommended. Note 3. The device is not guaranteed to function outside its operating conditions. Note 4. JA is measured in the natural convection at T A = 25C on a low effective thermal conductivity test board of JEDEC 51-3 thermal measurement standard.
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RT9246A
Typical Operating Characteristics
Duty Ratio vs. VCOMP
70
Power On
IOUT = 3A
RRT = 16k
60
Duty Ratio (%)
50 40 30 20 10 0 0.5 1 1.5 2 2.5 3 3.5
(5V/Div) (2V/Div)
V CC SS
(1V/Div)
VOUT
PGOOD
(5V/Div)
Time (25ms/Div)
VCOMP (V)
Power Off
IOUT = 3A
Start Up
(5V/Div) (2V/Div)
V CC SS
(5V/Div)
PWM
(2V/Div) (1V/Div)
SS
VOUT
(1V/Div) (1V/Div)
COMP
PGOOD
(5V/Div)
V CORE
Time (25ms/Div)
Time (10ms/Div)
VID Jump
Unit Gain
OVP
(2V/Div)
FB
(100mV/Div)
V CORE
(2V/Div)
SS
(500mV/Div)
SS
(2V/Div)
PWM
Time (5ms/Div)
Time (5ms/Div)
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RT9246A
Applications Information
RT9246A is a multi-phase DC/DC controller specifically designed to deliver high quality power for next generation CPU. Phase currents are sensed by innovative timesharing DCR current sensing technique for channel current balance, droop tuning, and over current protection. Using one common GM amplifier for current sensing eliminates offset errors and linearity variation between GMs. As submilli-ohm-grade inductors are widely used in modern mother boards, slight mismatch of GM amplifiers offset and linearity results in considerable current shift between phases. The time-sharing DCR current sensing technique is extremely important to guarantee phase current balance at mass production. Converter Initialization, Phase Selection, and Power Good Function The RT9246A initiates only after two pins are ready: VCC pin power on reset (POR) and DVD pin is higher than 1V. VCC POR is to make sure RT9246A is powered by a voltage for normal work. The rising threshold voltage of VCC POR is 4.2V typically. At VCC POR, RT9246A checks PWM3 status to determine phase number of operation. Pull high PWM3 for two-phase operation. The unused current sense pin should be connected to GND or left floating. DVD is to make sure that ATX12V is ready for companion MOSFET drivers(RT960X series) to work normally. Connect a voltage divider from ATX12V to DVD pin as shown in the Typical Application Circuit. Make sure that DVD pin voltage is below its threshold voltage before drivers are ready and above its threshold voltage for minimum ATX12V during normal operation. If either one of VCC and DVD is not ready, RT9246A keeps its PWM outputs high impedance and the companion drivers turn off both upper and lower MOSFETs. After VCC and DVD are ready, RT9246A initiates its soft start cycle as shown in Figure 1. A time-variant internal current source charges the capacitor connected to SS pin. SS voltage ramps up piecewise linearly and locks VID_DAC output with a specified voltage drop. Consequently, VCORE is built up according to VID_DAC output. PGOOD output is tripped to high impedance when VCORE reaches VID_DAC output with 1~2ms delay. An SS capacitor about 47nF is recommend for typical application.
VCC POR and DVD ready SS VCORE PGOOD
VID Jump 1~2ms 1~2ms 1~2ms
Figure 1. Timming Diagram During Soft Start Interval Voltage Control CPU VCORE voltage is Kelvin sensed by FB and FBRTN pins and precisely regulated to VID_DAC output by internal high gain Error Amplifier (EA). The sensed signal is also used for power good and over voltage function. The typical OVP trip point is 400mV above VID_DAC output. RT9246A pulls PWM outputs low and latches up upon OVP trip to prevent CPU from damaging. It can only restart by resetting either VCC or DVD pin. The VID pins are internally pulled high to internal 2.2V with 13k resistors and are easily interfaced with CPU VID outputs. The change of VID_DAC output at VID Jump is also smoothed by capacitor connected to SS pin. Consequently, VCORE shifts to its new position smoothly. DCR Current Sensing RT9246A adopts an innovative time-sharing DCR current sensing technique to sense the phase currents for phase current balance (phase thermal balance) and load line regulation as shown in Figure 2. Current sensing amplifier GM samples and holds voltages VX across the current sensing capacitor C X by turns in a switching cycle. According to the Basic Circuit Theory, if LX = RX x CX then VX = ILX x RLX RLX Consequently, the sensing current IX is proportional to inductor current ILX and is expressed as : IX = ILX x RLX RCOMM
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RT9246A
LX RX RLX CX + VX VCORE + ILX
T1
S/H CKT
+ T2
Ix
T3
T1
T4
RCOMM
Figure 2
The sensed current IX is used for current balance and droop tuning as described as followed. Since all phases share one common GM, GM offset and linearity variation effect is eliminated in practical applications. As sub-milli-ohmgrade inductors are widely used in modern mother boards, slight mismatch of GM amplifiers offset and linearity results in considerable current shift between phases. The timesharing DCR current sensing technical is extremely important to guarantee phase current balance at mass production. Phase Current Balance The sampled and held phase current IX are summed and averaged to get the averaged current IX . Each phase current IX then is compared with the averaged current. The difference between I X and IX is injected to corresponding PWM comparator. If phase current IX is smaller than the averaged current , RT9246A increases the duty cycle of corresponding phase to increase the phase current accordingly, vice versa.
Over Current Protection RT9246A uses an external resistor RIMAX connected to IMAX pin to generate a reference current IIMAX for over current protection: IIMAX= VIMAX RIMAX
where VIMAX is 1.0V typical. OCP comparator compares each sensed phase current IX with this reference current as shown in Figure 3. Equivalently, the maximum phase current is calculated as: ILX(MAX)= 3 VIMAX RCOMM 2 RIMAX RLX
OCP Comparator
+ -
1/3 IX 1/2 IIMAX
Figure 3. Over Current Comparator RT9246A uses hiccup mode to eliminate nuisance detection of OCP or reduce output current when output is shorted to ground as shown in Figure 4 and 5.
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RT9246A
Over Current Protection
(5V/Div)
where N is the phase number of operation. The averaged current IX is also injected into the resistor RIOUT connected to IOUT pin for monitoring load current. Voltage at IOUT pin VIOUT is proportional to load current and is calculated as: VIOUT = 8 IX x RIOUT = 8 x ICORE x RADJ x RLX N x RCOMM
Error Amp. + VADJ
PWM
(10A/Div)
I CORE VSS
(2V/Div)
VCORE
(500mV/Div)
VCORE
RFB1
IVOSS
4
Time (5ms/Div)
DAC
Figure 4. The Over Current Protection in the soft start interval
+ -
8IX
RADJ
Over Current Protection
Figure 6. Load Line and Offset Function Output Voltage Offset Function
(5A/Div)
RT9246A provides programmable initial offset function. External resistor RVOSS and voltage source at VOSS pin generate offset current IVOSS =
I CORE
(1V/Div)
VSS
, where VVOSS is 1V typical. One quarter of IVOSS flows through RFB1 as shown in Figure 6. Error amplifier would hold the inverting pin equal to VDAC - VADJ. A constant offset voltage is consequently added to VDAC - VADJ as :
Time (2.5ms/Div)
V VOSS R VOSS
VCORE = VDAC - VADJ +
RFB1 4 x RVOSS
Figure 5. Over Current Protection at steady state Current Ratio Setting Droop and Load Line Setting RT9246A injects averaged phase current IX into the resistor RADJ connected to ADJ pin to generate a loadcurrent-dependent voltage VADJ for droop setting:
VADJ = 8IX RADJ
VADJ is then subtracted form VID_DAC output as the real reference voltage at non-inverting input of the error amplifier as shown if Figure 6. Consequently, load line slope is calculated as: Load Line = VCORE 8 x RADJ x RLX = ICORE N x RCOMM
Current ratio adjustment is possible as described below. It is important for achieving thermal balance in practical application where thermal conditions between phases are not identical. Figure 7 shows the application circuit of GM for current ratio requirement. According to Basic Circuit Theory, if
LX = (RSX // RPX) x CX then RLX RPX VX = x ILX x RLX RSX+RPX
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RT9246A
With other phase kept unchanged, this phase would share (RPX+RSX)/RPX times current than other phases. Figure 8 and 9 show different current ratio setting for the power stage when Phase 3 is programmed 2 times current than other phases. Figure 10 and 11 compare the above current ratio setting results.
LX RSX +
40 35
Phase Current Balance
Phase Current (A)
30 25 20 15 10 5 0 0 15 30 45 60 75
RLX VX CX
ILX
RPX VCORE +
T
I CORE (A)
Figure 10
Current Ratio Function
35
Figure 7
30 25
I L (A)
20 15 10 5
Figure 8. Phase 3 Setting for current ratio function
0 0 15 30 45 60 75
I OUT (A)
Figure 11 Dead Zone Elimination RT9246A samples and holds inductor valley current by time-sharing sourcing a current IX to RCOMM. At light load condition when averaged inductor current is smaller than half of peak-to-peak inductor ripple current, voltage VX across the sensing capacitor is negative at valley. It needs a negative IX to sense the voltage. However, RT9246A CANNOT provide a negative IX and consequently cannot sense negative valley inductor current. This results in dead zone of load line performance as shown in Figure 12. Therefore a technique as shown in Figure 13 is required to eliminate the dead zone of load line at light load condition.
Figure 9. Phase 1~2 Setting for current ratio function
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RT9246A
Load Line without dead zone at light loads
1.31 1.3 1.29
RCOMM = 330, RADJ = 160, VOUT = 1.300V
1.3V -5A x 1m RCSN 330
w/o Dead Zone Compensation RCSN open
V CORE (V)
1.28 1.27 1.26 1.25 1.24 1.23 0 5 10 15 20 25
RCSN 85.8k Choose RCSN = 82k Figure 12 shows that dead zone of load line at light load is eliminated by applying this technique. Error Amplifier Characteristic For fast response of converter to meet stringent output current transient response, RT9246A provides large slew rate capability and high gain-bandwidth performance.
RCSN = 82k w/i Dead Zone Compensation
I OUT (A)
Figure 12
ILX LX RX RLX CX +VX
+ -
EA Falling Slew Rate
VOUT
VFB
500mV/Div) (2V/Div)
GMx Ix
RCOMM RCSN
VCOMP
Figure13. Application circuit of GM Referring to Figure 13, IX is expressed as: IX = VOUT ILX_V x RLX ILX_V x RLX + + RCSN RCSN RCOMM (1)
Time (250ns/Div)
Figure 14. EA Rising Transient with 10pF Loading; Slew Rate=8V/us
EA Rising Slew Rate
VFB
where ILX_V is the valley of inductor current. To make sure RT9246A could sense the valley current, right hand side of Equation (1) should always be positive: VOUT ILX_V x RLX ILX_V x RLX + + 0 RCSN RCSN RCOMM (2)
(500mV/Div)
Since RCSN >> RCOMM in practical application, Equation (2) could be simplified as:
VOUT ILX_V x RLX RCSN RCOMM
VCOMP
(2V/Div)
For example, assuming the negative inductor valley current is -5A at no load, then for
Time (250ns/Div)
Figure 15. EA Falling Transient with 10pF Loading; Slew Rate=8V/us
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RT9246A
4.7k B 4.7k
EA +
A
VREF
Figure 16. Gain-Bandwidth Measurement by signal A divided by signal B Design Procedure Suggestion a.Output filter pole and zero (Inductor, output capacitor value & ESR). b.Error amplifier compensation & sawtooth wave amplitude (compensation network). Current Loop Setting a.GM amplifier S/H current (current sense component DCR, ISPX and ICOMMON pin external resistor value). b.Over-current protection trip point (RIMAX resistor). VRM Load Line Setting a.Droop amplitude (ADJ pin resistor). b.No load offset (RCSN) c.DAC offset voltage setting (VOSS pin and compensation network resistor RB1) Power Sequence & SS DVD pin external resistor and SS pin capacitor. PCB Layout a.Sense for current sense GM amplifier input. b.Refer to layout guide for other items. Voltage Loop Setting Design Example Given: Apply for four phase converter VIN = 12V VCORE = 1.5V ILOAD(MAX) = 100A VDROOP = 100mV at full load (1m Load Line) OCP trip point set at 35A for each channel (S/H) Figure 17. Type 2 compensation network of EA
RB1 4.7k C2 68pF RB2 C1
DCR = 1m of inductor at 25C L = 1.5H COUT = 8000F with 5m equivalent ESR. 1. Compensation Setting a. Modulator Gain, Pole and Zero: From the following formula: Modulator Gain =VIN/VRAMP =12/1.9 = 6.3 (i.e 16dB) where VRAMP : ramp amplitude of saw-tooth wave LC Filter Pole = 1.45kHz and ESR Zero =3.98kHz b. EA Compensation Network: Select R1 = 4.7k, R2 = 15k, C1 = 12nF, C2 = 68pF and use the Type 2 compensation scheme shown in Figure 17. By calculation, the F Z = 0.88kHz, FP = 322kHz and Middle Band Gain is 3.19 (i.e 10.07dB).
15k 12nF EA +
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RT9246A
Layout Guide
Place the high-power switching components first, and separate them from sensitive nodes. 1. Most critical path: The current sense circuit is the most sensitive part of the converter. The current sense resistors tied to ISP1,2,3 and ICOMMON should be located not more than 0.5 inch from the IC and away from the noise switching nodes. The PCB trace of sense nodes should be parallel and as short as possible. R&C filter of choke should place close to PWM and the R & C connect directly to the pin of each output choke, use 10 mil differencial pair, and 20 mil gap to other phase pair. Less via as possible. 2. Switching ripple current path: a. Input capacitor to high side MOSFET. b. Low side MOSFET to output capacitor. c. The return path of input and output capacitor. d. Separate the power and signal GND. e. The switching nodes (the connection node of high/low side MOSFET and inductor) is the most noisy points.Keep them away from sensitive small-signal node. f . Reduce parasitic R, L by minimum length, enough copper thickness and avoiding of via. 3. MOSFET driver should be closed to MOSFET.
SW1
L1
VIN RIN
VOUT
V
CIN L2
COUT
RL
SW2
Figure 18. Power Stage Ripple Current Path
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RT9246A
Outline Dimension
D L
E
E1
e
A A1 b
A2
Symbol A A1 A2 b D e E E1 L
Dimensions In Millimeters Min 0.850 0.050 0.800 0.178 9.601 0.650 6.300 4.293 0.450 6.500 4.496 0.762 Max 1.200 0.152 1.050 0.305 9.804
Dimensions In Inches Min 0.033 0.002 0.031 0.007 0.378 0.026 0.248 0.169 0.018 0.256 0.177 0.030 Max 0.047 0.006 0.041 0.012 0.386
28-Lead TSSOP Plastic Package
Richtek Technology Corporation
Headquarter 5F, No. 20, Taiyuen Street, Chupei City Hsinchu, Taiwan, R.O.C. Tel: (8863)5526789 Fax: (8863)5526611
Richtek Technology Corporation
Taipei Office (Marketing) 8F, No. 137, Lane 235, Paochiao Road, Hsintien City Taipei County, Taiwan, R.O.C. Tel: (8862)89191466 Fax: (8862)89191465 Email: marketing@richtek.com
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